LINUX篇 基于debian9系统 CH23-LINUX下多路以太网实现

/dts-v1/;

/include/ "zynq-7000.dtsi"

/ {

model = "Zynq MZ7X Development Board";

compatible = "xlnx,zynq-MZ7X", "xlnx,zynq-7000";

aliases {

ethernet0 = &axi_ethernet_0;

ethernet1 = &axi_ethernet_1;

ethernet2 = &gem0;

serial0   = &uart1;

mmc0      = &sdhci0;

mmc1      = &sdhci1;

};

memory@0 {

device_type = "memory";

reg = <0x0 0x40000000>;

};

chosen {

bootargs = "";

stdout-path = "serial0:115200n8";

};

usb_phy0: phy0@e0002000 {

compatible = "ulpi-phy";

#phy-cells = <0>;

reg = <0xe0002000 0x1000>;

view-port = <0x0170>;

drv-vbus;

};

};

&clkc {

ps-clk-frequency = <33333333>;

};

/ {

cpus {

cpu@0 {

operating-points = <666666 1000000 333333 1000000>;

};

};

};

/ {

amba_pl: amba_pl {

#address-cells = <1>;

#size-cells = <1>;

compatible = "simple-bus";

ranges ;

axi_dma_0: dma@40400000 {

#dma-cells = <1>;

axistream-connected = <&axi_ethernet_0>;

axistream-control-connected = <&axi_ethernet_0>;

clock-names = "s_axi_lite_aclk";

clocks = <&clkc 15>;

compatible = "xlnx,eth-dma";

interrupt-names = "mm2s_introut", "s2mm_introut";

interrupt-parent = <&intc>;

interrupts = <0 29 4 0 30 4>;

reg = <0x40400000 0x10000>;

xlnx,include-dre ;

};

axi_dma_1: dma@40410000 {

#dma-cells = <1>;

axistream-connected = <&axi_ethernet_1>;

axistream-control-connected = <&axi_ethernet_1>;

clock-names = "s_axi_lite_aclk";

clocks = <&clkc 15>;

compatible = "xlnx,eth-dma";

interrupt-names = "mm2s_introut", "s2mm_introut";

interrupt-parent = <&intc>;

interrupts = <0 33 4 0 34 4>;

reg = <0x40410000 0x10000>;

xlnx,include-dre ;

};

axi_ethernet_0: ethernet@41000000 {

axistream-connected = <&axi_dma_0>;

axistream-control-connected = <&axi_dma_0>;

clock-frequency = <100000000>;

clock-names = "ref_clk";

clocks = <&clkc 0>;

compatible = "xlnx,axi-ethernet-1.00.a";

device_type = "network";

interrupt-names = "mac_irq", "interrupt";

interrupt-parent = <&intc>;

interrupts = <0 31 1 0 32 4>;

phy-mode = "rgmii";

reg = <0x41000000 0x40000>;

xlnx = <0x0>;

xlnx,axiliteclkrate = <0x0>;

xlnx,axisclkrate = <0x0>;

xlnx,clockselection = <0x0>;

xlnx,enableasyncsgmii = <0x0>;

xlnx,gt-type = <0x0>;

xlnx,gtinex = <0x0>;

xlnx,gtlocation = <0x0>;

xlnx,gtrefclksrc = <0x0>;

xlnx,include-dre ;

xlnx,instantiatebitslice0 = <0x0>;

xlnx,phy-type = <0x3>;

xlnx,phyaddr = <0x1>;

xlnx,rable = <0x0>;

xlnx,rxcsum = <0x0>;

xlnx,rxlane0-placement = <0x0>;

xlnx,rxlane1-placement = <0x0>;

xlnx,rxmem = <0x1000>;

xlnx,rxnibblebitslice0used = <0x0>;

xlnx,tx-in-upper-nibble = <0x1>;

xlnx,txcsum = <0x0>;

xlnx,txlane0-placement = <0x0>;

xlnx,txlane1-placement = <0x0>;

local-mac-address = [00 0a 35 00 00 00];

phy-handle = <&phy0>;

axi_ethernet_0_mdio: mdio {

#address-cells = <1>;

#size-cells = <0>;

phy0: phy@0 {

device_type = "ethernet-phy";

reg = <0x0>;

};

};

};

axi_ethernet_1: ethernet@41040000 {

axistream-connected = <&axi_dma_1>;

axistream-control-connected = <&axi_dma_1>;

clock-frequency = <100000000>;

clock-names = "ref_clk";

clocks = <&clkc 0>;

compatible = "xlnx,axi-ethernet-1.00.a";

device_type = "network";

interrupt-names = "mac_irq", "interrupt";

interrupt-parent = <&intc>;

interrupts = <0 35 1 0 36 4>;

phy-mode = "rgmii";

reg = <0x41040000 0x40000>;

xlnx = <0x0>;

xlnx,axiliteclkrate = <0x0>;

xlnx,axisclkrate = <0x0>;

xlnx,clockselection = <0x0>;

xlnx,enableasyncsgmii = <0x0>;

xlnx,gt-type = <0x0>;

xlnx,gtinex = <0x0>;

xlnx,gtlocation = <0x0>;

xlnx,gtrefclksrc = <0x0>;

xlnx,include-dre ;

xlnx,instantiatebitslice0 = <0x0>;

xlnx,phy-type = <0x3>;

xlnx,phyaddr = <0x1>;

xlnx,rable = <0x0>;

xlnx,rxcsum = <0x0>;

xlnx,rxlane0-placement = <0x0>;

xlnx,rxlane1-placement = <0x0>;

xlnx,rxmem = <0x1000>;

xlnx,rxnibblebitslice0used = <0x0>;

xlnx,tx-in-upper-nibble = <0x1>;

xlnx,txcsum = <0x0>;

xlnx,txlane0-placement = <0x0>;

xlnx,txlane1-placement = <0x0>;

local-mac-address = [00 0a 35 00 00 01];

phy-handle = <&phy1>;

axi_ethernet_1_mdio: mdio {

#address-cells = <1>;

#size-cells = <0>;

phy1: phy@1 {

device_type = "ethernet-phy";

reg = <0x1>;

};

};

};

};

};

&gem0 {

status = "okay";

phy-mode = "rgmii-id";

phy-handle = <eernet_phy>;

ethernet_phy: ethernet-phy@0 {

reg = <0>;

device_type = "ethernet-phy";

};

};

&gpio0 {

emio-gpio-width = <64>;

gpio-mask-high = <0x0>;

gpio-mask-low = <0x5600>;

};

&intc {

num_cpus = <2>;

num_interrupts = <96>;

};

&qspi {

u-boot,dm-pre-reloc;

status = "okay";

is-dual = <0>;

num-cs = <1>;

flash@0 {

compatible = "n25q128a11";

reg = <0x0>;

spi-tx-bus-width = <4>;

spi-rx-bus-width = <4>;

spi-max-frequency = <125000000>;

};

};

&sdhci0 {

u-boot,dm-pre-reloc;

status = "okay";

xlnx,has-cd = <0x1>;

xlnx,has-power = <0x0>;

xlnx,has-wp = <0x0>;

};

&sdhci1 {

status = "okay";

xlnx,has-cd = <0x0>;

xlnx,has-power = <0x0>;

xlnx,has-wp = <0x0>;

};

&uart1 {

u-boot,dm-pre-reloc;

status = "okay";

};

&usb0 {

status = "okay";

dr_mode = "host";

usb-phy = <&usb_phy0>;

};