ZC706 debian启动时卡在启动kernel的某一步

我在mz7010的板子和linux脚本的基础上，修改，想移植debian到zc706上面。uboot的修改：
1. defconfig改成了zc706的
2. CONFIG_BOOTDELAY=0. CONFIG_BOOTCOMMAND="run $modeboot"
3. dts也用的zc706
4.u-boot/incude/configs/zynq-zc70x.h也加入了跟zynq-mz7x.h一样的宏 CONFIG_EXTRA_ENV_SETTINGS

kernel的修改：
1.xilinx_mz7x_defconfig改成了xilinx_zynq_defconfig

我重新编译和烧录到SD卡后，从SD卡上启动，看到的现象是无法往下继续了（按ctrl+C也没有动静）。下面是uart打印出来的情况。请问这个原因一般是什么呀？我应该怎么解决。着急呀，移植这个搞了半个月了，还没有搞定呢。

Booting Linux on physical CPU 0x0
Linux version 4.14.0-xilinx (osrc@osrc) (gcc version 7.2.1 20171011 (Linaro GCC                                                                                                                                                             7.2-2017.11-rc1)) #1 SMP PREEMPT Fri Jul 12 01:29:10 EDT 2019
CPU: ARMv7 Processor [413fc090] revision 0 (ARMv7), cr=18c5387d
CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
OF: fdt: Machine model: xlnx,zynq-7000
Memory policy: Data cache writealloc
cma: Reserved 16 MiB at 0x3f000000
random: fast init done
percpu: Embedded 16 pages/cpu @ef7cf000 s34764 r8192 d22580 u65536
Built 1 zonelists, mobility grouping on.  Total pages: 260608
Kernel command line: console=ttyPS0,115200 earlyprintk root=/dev/mmcblk0p2 rw ro                                                                                                                                                          otfstype=ext4 rootwait console=tty0 consoleblank=0 vt.global_cursor_default=0
PID hash table entries: 4096 (order: 2, 16384 bytes)
Dentry cache hash table entries: 131072 (order: 7, 524288 bytes)
Inode-cache hash table entries: 65536 (order: 6, 262144 bytes)
Memory: 1012892K/1048576K available (6144K kernel code, 238K rwdata, 1560K rodat                                                                                                                                                          a, 1024K init, 153K bss, 19300K reserved, 16384K cma-reserved, 245760K highmem)
Virtual kernel memory layout:
vector  : 0xffff0000 - 0xffff1000 ( 4 kB)
fixmap  : 0xffc00000 - 0xfff00000 (3072 kB)
vmalloc : 0xf0800000 - 0xff800000 ( 240 MB)
lowmem  : 0xc0000000 - 0xf0000000 ( 768 MB)
pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB)
modules : 0xbf000000 - 0xbfe00000 (  14 MB)
   .text : 0xc0008000 - 0xc0700000 (7136 kB)
   .init : 0xc0900000 - 0xc0a00000 (1024 kB)
   .data : 0xc0a00000 - 0xc0a3b8c0 ( 239 kB)
   .bss : 0xc0a3b8c0 - 0xc0a61f84 ( 154 kB)
Preemptible hierarchical RCU implementation.
      RCU restricting CPUs from NR_CPUS=4 to nr_cpu_ids=2.
      Tasks RCU enabled.
RCU: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=2
NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16
efuse mapped to f0800000
slcr mapped to f0802000
L2C: platform modifies aux control register: 0x72360000 -> 0x72760000
L2C: DT/platform modifies aux control register: 0x72360000 -> 0x72760000
L2C-310 erratum 769419 enabled
L2C-310 enabling early BRESP for Cortex-A9
L2C-310 full line of zeros enabled for Cortex-A9
L2C-310 ID prefetch enabled, offset 1 lines
L2C-310 dynamic clock gating enabled, standby mode enabled
L2C-310 cache controller enabled, 8 ways, 512 kB
L2C-310: CACHE_ID 0x410000c8, AUX_CTRL 0x76760001
zynq_clock_init: clkc starts at f0802100
Zynq clock init
sched_clock: 64 bits at 333MHz, resolution 3ns, wraps every 4398046511103ns
clocksource: arm_global_timer: mask: 0xffffffffffffffff max_cycles: 0x4ce07af025                                                                                                                                                          , max_idle_ns: 440795209040 ns
Switching to timer-based delay loop, resolution 3ns
clocksource: ttc_clocksource: mask: 0xffff max_cycles: 0xffff, max_idle_ns: 5375                                                                                                                                                          38477 ns
timer #0 at f080a000, irq=17
Console: colour dummy device 80x30
console [tty0] enabled
Calibrating delay loop (skipped), value calculated using timer frequency.. 666.6                                                                                                                                                          6 BogoMIPS (lpj=3333333)
pid_max: default: 32768 minimum: 301
Mount-cache hash table entries: 2048 (order: 1, 8192 bytes)
Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes)
CPU: Testing write buffer coherency: ok
CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
Setting up static identity map for 0x100000 - 0x100060
Hierarchical SRCU implementation.
smp: Bringing up secondary CPUs ...
CPU1: thread -1, cpu 1, socket 0, mpidr 80000001
smp: Brought up 1 node, 2 CPUs
SMP: Total of 2 processors activated (1333.33 BogoMIPS).
CPU: All CPU(s) started in SVC mode.
devtmpfs: initialized
VFP support v0.3: implementor 41 architecture 3 part 30 variant 9 rev 4
clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 1911                                                                                                                                                          2604462750000 ns
futex hash table entries: 512 (order: 3, 32768 bytes)
pinctrl core: initialized pinctrl subsystem
NET: Registered protocol family 16
DMA: preallocated 256 KiB pool for atomic coherent allocations
cpuidle: using governor menu
hw-breakpoint: found 5 (+1 reserved) breakpoint and 1 watchpoint registers.
hw-breakpoint: maximum watchpoint size is 4 bytes.
zynq-ocm f800c000.ocmc: ZYNQ OCM pool: 256 KiB @ 0xf0880000
zynq-pinctrl 700.pinctrl: zynq pinctrl initialized
e0001000.serial: ttyPS0 at MMIO 0xe0001000 (irq = 25, base_baud = 3125000) is a                                                                                                                                                             xuartps
console [ttyPS0] enabled

uisrc · 发表于 2019-7-13 15:56:22

发一份原理图，帮你做个启动文件

jenny · 发表于 2019-7-13 16:36:16

admin 发表于 2019-7-13 15:56
发一份原理图，帮你做个启动文件

太感谢了。
我这个用的是zc706，原理图直接是从xilinx网站下载的。
原理图为附件。

谢谢。

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